Past exam questions for Digital Logic, organised chapter by chapter with solutions.
What is BCD code?
Convert \((1010)_2\) to gray code.
Convert \((101011.1101)_2\) to Octal and Hexadecimal form.
Find the value of \((279)_{10} + (799)_{10}\) by converting it to BCD data.
What is digital system?
How many different combination can be represented by 5-bit binary data?
Convert \(2A3B.2A_{16}\) into binary, octal and decimal.
Realize the property of NOR gate and NOT gate using NAND gate.
Realize the property of AND, OR and NOT gate using NAND gate.
What is the use of k-map?
Define canonical form.
Minimize the following Boolean function: \(f(P, R, S, Q) = \sum(0, 2, 3, 7, 8, 10, 13, 15)\) and draw circuit diagram using only NOR gates.
What is the use of Karnaugh Map?
Define don't case condition.
If a Boolean function \(F = \bar{x}y + x\bar{y} + xyz\), solve the given function using K-map.
If a Boolean function \(F = AB + \bar{B}C\), find a equivalent POS.
What is Boolean algebra? List any five Boolean rules and verify any two Boolean rules using truth table method.
Define Decoder.
Design half adder using NAND gates.
Design 1 × 4 De-multiplexer.
If the content of Register A is \((1011)_2\) and Register B is \((1101)_2\). Design a combinational circuit for adding the content of these two register.
How many input lines are required to generate 995 decoded lines?
How many don't case condition are possible in \(8 \times 3\) encoder?
Design \(4 \times 1\) multiplexer.
Design a circuit diagram of a 3-bit parallel adder.
Mention any two differences between combinational and sequential circuit.
What is triggering of a Flip-flop?
What is clock pulse?
Illustrate and explain basic Flip-Flop.
Illustrate and explain JK Flip-Flop.
Differentiate between combinational and sequential circuit.
What is the problem of "T" flip-flop?
Why flip flop is said to be 1 bit memory?
Explain triggering of a flip-flop with its types.
What is the advantage of JK flip flop over clocked SR flip flop? Explain the operational characteristics of JK flip flop with logic diagram.
Define counter.
What is shift Register?
Design a 3-bit Asynchronous counter.
Design MOD-7 synchronous counter.
Design a four bit parallel In/shift right/serial out shift register. Also illustrate how binary data \((1011)_2\) is load and retrieved in your design circuit.
What is the number of clock pulses required to input and output "5" bit data in parallel in serial out shift register?
What is gray code? Design 3-bit synchronous counter.
You are provided with data bits 1011. The register provided has the capability to store all bits in one clock pulse and can be retrieved those stored bits only one at a time from right most flip flop. Your work is to draw the circuit and show all necessary steps to store and retrieve the provided data in provided register.
Differentiate between PLA and ROM. Design MOD-150 asynchronous counter.
